M68AW127BM70NK6T Datasheet PDF - ST Microelectronics

●SUMMARY DESCRIPTION

●The M68AW127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad dress access and cycle times. It requires a single

●2.7 to 3.6V supply.

●FEATURES SUMMARY

●■ SUPPLY VOLTAGE: 2.7 to 3.6V

●■ 128K x 8 bits SRAM with OUTPUT ENABLE

●■ EQUAL CYCLE and ACCESS TIMES: 70ns

●■ LOW STANDBY CURRENT

●■ LOW VCC DATA RETENTION: 1.5V

●■ TRI-STATE COMMON I/O

●■ LOW ACTIVE and STANDBY POWER