Part 3D Model

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EPM7160SQC160-10 Datasheet PDF - Intel

Manufacturer:

Intel

Case Package:

QFP-160

Description:

EE PLD, 10ns, 160-Cell, CMOS, PQFP160, PLASTIC, QFP-160

Pictures:

3D Model

Symbol

Footprint

Pinout

Product Pictures

Documentation:

EPM7160SQC160-10 Programming Manual (66 Pages)

EPM7160SQC160-10 Datasheet PDF (66 Pages)

View Datasheet

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EPM7160SQC160-10 Specifications

TYPE

DESCRIPTION

Mounting Style

Surface Mount

Number of Pins

160 Pin

Case/Package

QFP-160

Operating Temperature (Max)

70 ℃

Operating Temperature (Min)

0 ℃

EPM7160SQC160-10 Size & Package

TYPE

DESCRIPTION

Product Lifecycle Status

Active

Packaging

Tray

Operating Temperature

0℃ ~ 70℃ (TA)

EPM7160SQC160-10 Environmental

EPM7160SQC160-10 Documents

EPM7160SQC160-10 Programming Manual

Intel

66 Pages / 1.45 MByte

EPM7160SQC160-10 Other Datasheet PDF

Intel

135 Pages / 0.47 MByte

EPM7160 Documents

EPM7160STI100-10N Datasheet PDF

Altera

CPLD MAX 7000S Family 3.2K Gates 160 Macro Cells 100MHz CMOS Technology 5V 100Pin TQFP

EPM7160SLC84-10N Datasheet PDF

Altera

CPLD MAX 7000 Family 3.2K Gates 160 Macro Cells 100MHz 5V 84Pin PLCC

EPM7160STC100-10 Datasheet PDF

Altera

CPLD MAX 7000S Family 3.2K Gates 160 Macro Cells 100MHz CMOS Technology 5V 100Pin TQFP

EPM7160ELC84-20 Datasheet PDF

Altera

CPLD MAX 7000 Family 3.2K Gates 160 Macro Cells 62.5MHz CMOS Technology 5V 84Pin PLCC

EPM7160SLC84-10 Datasheet PDF

Altera

CPLD MAX 7000S Family 3.2K Gates 160 Macro Cells 100MHz CMOS Technology 5V 84Pin PLCC

EPM7160STC100-10N Datasheet PDF

Altera

CPLD MAX 7000S Family 3.2K Gates 160 Macro Cells 100MHz 5V 100Pin TQFP

EPM7160ELC84-12 Datasheet PDF

Altera

CPLD MAX 7000 Family 3.2K Gates 160 Macro Cells 90.9MHz CMOS Technology 5V 84Pin PLCC

EPM7160SLI84-10 Datasheet PDF

Altera

CPLD MAX 7000S Family 3.2K Gates 160 Macro Cells 100MHz CMOS Technology 5V 84Pin PLCC

EPM7160STI100-10 Datasheet PDF

Altera

CPLD MAX 7000S Family 3.2K Gates 160 Macro Cells 100MHz 5V 100Pin TQFP

EPM7160ELI84-20 Datasheet PDF

Altera

CPLD MAX 7000 Family 3.2K Gates 160 Macro Cells 62.5MHz CMOS Technology 5V 84Pin PLCC

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