74LVC1T45GW Datasheet PDF - NXP

●The 74LVC1T45GW is a dual supply Translating Transceiver with 3-state outputs that enable bidirectional level translation. It features two 1-bit input-output ports, a direction control input (DIR) and dual supply pins. Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2 and 5.5V making the device suitable for translating between any of the low voltage nodes. Pins A and DIR are referenced to VCC(A) and pin B is referenced to VCC(B). A HIGH on DIR allows transmission from A to B and a LOW on DIR allows transmission from B to A. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and B port are in the high-impedance OFF-state. Active bus hold circuitry in the 74LVCH1T45 holds unused or floating data inputs at a valid logic level.

● High noise immunity

● IOFF circuitry provides partial Power-down mode operation

● Complies with JEDEC standards

● Suspend mode

● 16µA Maximum ICC low power consumption

● Inputs accept voltages up to 5.5V

● Latch-up performance exceeds 100mA per JESD 78 class II

● ±24mA Output drive