74AHC123APW Datasheet PDF - NXP

●General description

●The 74AHC123A; 74AHCT123A are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

●Features

●■ All inputs have a Schmitt-trigger action

●■ Inputs accept voltages higher than VCC

●■ DC triggered from active HIGH or active LOW inputs

●■ Retriggerable for very long pulses up to 100 % duty factor

●■ Direct reset terminates output pulse

●■ For 74AHC123A only: operates with CMOS input levels

●■ For 74AHCT123A only: operates with TTL input levels

●■ ESD protection:

●   ◆ HBM JESD22-A114E exceeds 2000 V

●   ◆ MM JESD22-A115-A exceeds 200 V

●    ◆ CDM JESD22-C101C exceeds 1000 V

●■ Multiple package options

●■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C